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Homepage>IEC Standards>IEC 60191-6-5:2001 - Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA)
download between 0-24 hoursReleased: 2001-08-27
IEC 60191-6-5:2001 - Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA)

IEC 60191-6-5:2001

Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA)

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Standard number:IEC 60191-6-5:2001
Released:2001-08-27
Edition:1
ICS:31.080.01
Pages (English):10
ISBN (English):2831859395
DESCRIPTION

IEC 60191-6-5:2001

Provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch ball grid array the terminal pitch of which is less than or equal to 0,80 mm.

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