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Current revisionReleased: 01.01.2023
IPC-J-STD-003 - Revision D
Solderability Tests for Printed Boards
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Chinese Secure PDF
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168.30 EUR
Chinese Hardcopy
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252.45 EUR
English Secure PDF
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English Hardcopy
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View table of Contents
| Standard Number: | IPC-J-STD-003 - Revision D |
| DOD Adopted: | No |
| ANSI Approved: | No |
| Revision: | D |
| Released: | 01.01.2023 |
| ISBN (English): | 978-1-63816-105-9 |
| Pages (English): | 44 |
| ISBN (Chinese): | 978-1-63816-141-7 |
| Pages (Chinese): | 44 |
DESCRIPTION
The IPC J-STD-003D standard describes solderability determinations that are made to verify that the printed board fabrication processes and subsequent storage have had no adverse effect on the solderability of those portions of the printed board intended to be soldered. Solderability is determined by evaluation of a test specimen which has been processed as part of a panel of boards and subsequently removed for testing per the method selected. IPC J-STD-003D provides solderability test methods to determine the acceptance of printed board surface conductors, attachment lands, and plated-through holes to wet easily with solder, and to withstand the rigors of the printed board assembly processes.
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