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immediate downloadReleased: 2026-02-04
IEC 63378-6:2026
Thermal standardization on semiconductor packages - Part 6: Thermal resistance and capacitance model for transient temperature prediction at junction and measurement points
Normalisation thermique des boîtiers de semiconducteurs - Partie 6: Modèle de résistance thermique et de capacité pour la prédiction de la température transitoire aux points de jonction et de mesure
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English/French - Bilingual PDF
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English/French - Bilingual Hardcopy
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View table of Contents
| Standard number: | IEC 63378-6:2026 |
| Released: | 2026-02-04 |
| Edition: | 1 |
| ICS: | 31.080.01 |
| Pages (English): | 28 |
| ISBN (English): | 9782832710012 |
| Pages (English/French - Bilingual): | 57 |
| ISBN (English/French - Bilingual): | 9782832710012 |
DESCRIPTION
IEC 63378-6:2026
IEC 63378-6:2026 specifies a thermal resistance and capacitance model for semiconductor packages. This model is named the digital transformation using thermal resistance and capacitance (DXRC) model. It predicts transient temperature at junction and measurement points.
This document applies to semiconductor packages such as TO-252, TO-263, and HSOP. It supports single chip packages dissipated heat from single package surface.