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Homepage>IEEE Standards>31 ELECTRONICS>31.200 Integrated circuits. Microelectronics>IEEE/IEC 61523-4-2015 - IEEE/IEC International Standard - Design and Verification of Low-Power Integrated Circuits
Released: 24.03.2015

IEEE/IEC 61523-4-2015 - IEEE/IEC International Standard - Design and Verification of Low-Power Integrated Circuits

IEEE/IEC International Standard - Design and Verification of Low-Power Integrated Circuits

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Standard number:IEEE/IEC 61523-4-2015
Released:24.03.2015
ISBN:978-2-8322-2266-9
Pages:351
Status:Active
Language:English
DESCRIPTION

IEEE/IEC 61523-4-2015

This standard establishes a format used to define the low-power design intent for electronic systems and electronic intellectual property (IP). The format provides the ability to specify the supply network, switches, isolation, retention, and other aspects relevant to power management of an electronic system. The standard defines the relationship between the low-power design specification and the logic design specification captured via other formats [e.g., standard hardware description languages (HDLs)].

The purpose of this standard is to provide portable low-power design specifications that can be used with a variety of commercial products throughout an electronic system design, analysis, verification, and implementation flow.

Adoption Standard - Active. A method is provided for specifying power intent for an electronic design, for use in verification of the structure and behavior of the design in the context of a given power management architecture, and for driving implementation of that power management architecture. The method supports incremental refinement of power intent specifications required for IP-based design flows.