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Homepage>IEEE Standards>35 INFORMATION TECHNOLOGY. OFFICE MACHINES>35.160 Microprocessor systems>IEEE/ISO/IEC 13213-1994 - ISO/IEC/IEEE International Standard for Information technology--Microprocessor systems--Control and Status Registers (CSR) Architecture for microcomputer buses
Released: 05.10.1994

IEEE/ISO/IEC 13213-1994 - ISO/IEC/IEEE International Standard for Information technology--Microprocessor systems--Control and Status Registers (CSR) Architecture for microcomputer buses

ISO/IEC/IEEE International Standard for Information technology--Microprocessor systems--Control and Status Registers (CSR) Architecture for microcomputer buses

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Standard number:IEEE/ISO/IEC 13213-1994
Released:05.10.1994
ISBN:978-0-7381-1214-5
Pages:144
Status:Active
Language:English
DESCRIPTION

IEEE/ISO/IEC 13213-1994

This International Standard defines the address-space maps, the bus transaction sets, and the node’s CSRs. The intention is to provide a sufficient and standard framework for the design of vendor-dependent unit architectures. The specification includes the format and content of the configuration ROM on the node. The configuration ROM provide the parameters necessary to autoconfigure systems with nonprocessor nodes provided by multiple vendors. Note that a monarch selection process, which selects one processor to boot the system, is not defined. A monarch selection process would be necessary to initialize a system containing processors provided by different vendors. The annexes provide background for understanding the usage of this CSR Architecture specification. The CSR Architecture provides the specification upon which conforming designs should be based. The annex clauses illustrate ways that these capabilities could be used. Note that the annexes are nonbinding.



New IEEE Standard - Active. The document structure and notation are described, and the objectives and scope of the CSR Architecture are outlined. Transition set requirements, node addressing, node architectures, unit architectures, and CSR definitions are set forth. The ROM specification and bus standard requirements are covered.